The Setup

All the information on this site will be based on the following setup I am using:

• Target FPGA: Virtex5 (lx110t)
• FPGA Development Board: XUPV5-lx110t
• Development tools: Xilinx ISE Design Suit 12.3
• Software Development IDE: Eclipse

Currently work is in progress on the OpenCL implementation for the FPGA. Once it is done and the ICD layer of Khronos group is implemented, a GPU will be selected for the project.

The Project

With the availability of multi-core processors, high capacity FPGAs, and GPUs, a heterogeneous system with tremendous raw computing capacity can easily be constructed consisting of any number of these computing elements. However, the challenge for such a system is to have a framework under which an application's computational tasks can be easily and effectively distributed amongst the computing elements. The target of this project is to build a OpenCL™ based framework for a heterogeneous system consisting of multi-core processors, FPGAs, and GPUs.

OpenCL™ (Open Computing Language) is specifically designed for applications to execute on heterogeneous systems. In particular, the driving force for OpenCL was to facilitate systems with CPUs and GPUs, and as such there is ample OpenCL support for CPUs and GPUs from various vendors. However, there has been little effort for OpenCL support for systems containing FPGAs and the possible adaptability of OpenCL for FPGAs needs to be researched.